Nitride semiconductor device

ABSTRACT

A nitride semiconductor device includes a substrate; a nitride semiconductor multilayer structure which is formed on the substrate, includes a first nitride semiconductor layer and a second nitride semiconductor layer having a different composition from that of the first nitride semiconductor layer, and generates two dimensional electron gas on a hetero interface between the first nitride semiconductor layer and the second nitride semiconductor layer; and an insulating film which covers at least a portion of a surface of the nitride semiconductor multilayer structure, has a concentration of Si—H bonds equal to or less than 6.0×10 21  cm −3 , and is formed of silicon nitride.

TECHNICAL FIELD

The invention relates to a nitride semiconductor device.

BACKGROUND ART

In the related art, it is known that a phenomenon called a currentcollapse occurs in which on-resistance changes when a voltage is appliedto a field effect transistor using two-dimensional electron gas (2 DEG)generated on a hetero interface of a nitride semiconductor multilayerstructure formed of a plurality of layers having different compositions;however, the current collapse may be suppressed by laminating a siliconnitride (SiN) film on the surface of the nitride semiconductor. In thisregard, an effect of suppressing the current collapse is affected by theproperties of the SiN film, and thus various research and developmenthave been conducted.

The SiN film with a high effect of suppressing the current collapse hasa defect in that current leaks. Accordingly, an idea has been proposedthat the SiN film laminated on the surface of the nitride semiconductorhas a two-layer structure including a layer which contains a largeamount of hydrogen and has a function of suppressing the currentcollapse, and a layer which contains less hydrogen and has a function ofsuppressing the leakage current.

Examples of the nitride semiconductor device in which the SiN filmhaving such a two-layer structure is laminated on the surface of thenitride semiconductor include a semiconductor device which is disclosedin Japanese Unexamined Patent Application Publication No. 2008-205392(PTL 1). In the semiconductor device disclosed in PTL 1, anon-stoichiometry first SiN film having a high concentration of Si—H orN—H and a substantially stoichiometry second SiN film which has a smallquantity of Si—H or N—H bonds and is excellent in the insulationproperties are laminated on a surface of a compound semiconductor regionincluding a GaN electron transit layer, an AlGaN electron supply layer,and a GaN surface layer, thereby intending to suppress both of thecurrent collapse and the leakage current.

In addition, examples of the aforementioned nitride semiconductor devicealso include a semiconductor device which is disclosed in JapaneseUnexamined Patent Application Publication No. 2009-164300 (PTL 2). Inthe semiconductor device disclosed in PTL 2, a stoichiometry first SiNfilm which has a low total concentration of the added concentration ofSi—H bonds and concentration of N—H bonds and is excellent in theinsulation properties, and a non-stoichiometry second SiN film which hasa high total concentration of the added concentration of Si—H bonds andconcentration of N—H bonds and is excellent in stabilizing a surface ofthe compound semiconductor are laminated on the surface of a compoundsemiconductor multilayer structure including a GaN electron transitlayer, an AlGaN electron supply layer, and a GaN surface layer, therebyintending to suppress both of the current collapse and the leakagecurrent.

However, the semiconductor devices in the related art disclosed in PTL 1and PTL 2 have the following problem.

That is, it is confirmed that even if two layers of the SiN films arelaminated on the surface of the compound semiconductor region includingthe above-described nitride semiconductor, when a high temperature andhigh voltage stress test is conducted, the semiconductor device has theleakage current increased and is not able to be used as a switchingdevice for a long period time.

CITATION LIST Patent Literature

PTL 1: Japanese Unexamined Patent Application Publication No.2008-205392

PTL 2: Japanese Unexamined Patent Application Publication No.2009-164300

SUMMARY OF INVENTION Technical Problem

In this regard, an object of the invention is to provide a nitridesemiconductor device in which the properties of a SiN film laminated ona nitride semiconductor layer are improved and which is capable of beingused as a switching device for a long period time with a high yield on ahigh temperature and high voltage stress test.

Solution to Problem

In order to achieve the above-described object, a nitride semiconductordevice of the invention includes a substrate; a nitride semiconductormultilayer structure which is formed on the substrate, includes a firstnitride semiconductor layer, and a second nitride semiconductor layerhaving a composition different from a composition of the first nitridesemiconductor layer, and generates two dimensional electron gas on ahetero interface between the first nitride semiconductor layer and thesecond nitride semiconductor layer; and an insulating film which coversat least a portion of a surface of the nitride semiconductor multilayerstructure, has a concentration of Si—H bonds equal to or less than6.0×10²¹ cm⁻³, and is formed of silicon nitride.

In addition, in the nitride semiconductor device of an embodiment, thesilicon nitride forming the insulating film has a concentration of bondsequal to or greater than 1.0×10²¹ cm⁻³.

In addition, in the nitride semiconductor device of an embodiment, theinsulating film is a first insulating film and the nitride semiconductordevice further includes a second insulating film which is laminated onthe first insulating film, and is formed of silicon nitride of which aconcentration of Si—H bonds is greater than the concentration of Si—Hbonds in the first insulating film.

In addition, in the nitride semiconductor device of an embodiment, atotal film thickness of the first insulating film and the secondinsulating film is equal to or greater than 25 nm.

In addition, the nitride semiconductor device of an embodiment furtherincludes a third insulating film which covers at least a portion of thesecond insulating film, is formed of silicon nitride of which aconcentration of Si—H bonds is less than the concentration of Si—H bondsin the second insulating film.

A method of manufacturing a nitride semiconductor device of theinvention is a method of manufacturing the nitride semiconductor deviceof the invention or an embodiment, in which the insulating film isannealed at 800° C. or higher.

Advantageous Effects of Invention

As described above, in the nitride semiconductor device of theinvention, an insulating film which covers at least a portion of asurface of the nitride semiconductor multilayer structure and is formedof silicon nitride has a concentration of Si—H bonds equal to or lessthan 6.0×10²¹ cm⁻³. Accordingly, in a case of conducting a hightemperature and high voltage stress test on a semiconductor elementusing the nitride semiconductor device, it is possible to preventoccurrence of defects in which the leakage current after the testexceeds five times the leakage current before the test, and thereby itis possible to improve the properties of the insulating film

That is, according to the invention, it is possible to provide a nitridesemiconductor device which is capable of being used as a switchingdevice for a long period time.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a sectional view in a nitride semiconductor HFET as a nitridesemiconductor device of the invention.

FIG. 2 is a sectional view in a process of manufacturing the nitridesemiconductor HFET as illustrated in FIG. 1.

FIG. 3 is a sectional view in a step following FIG. 2.

FIG. 4 is a sectional view in a step following FIG. 3.

FIG. 5 is a sectional view in a step following FIG. 4.

FIG. 6 is a sectional view in a step following FIG. 5.

FIG. 7 is a diagram illustrating a relationship between a yield on ahigh temperature and high voltage stress test and a Si—H bondconcentration of an insulating film.

FIG. 8 is a sectional view in a nitride semiconductor HFET which isdifferent from the nitride semiconductor HFET illustrated in FIG. 1.

FIG. 9 is a sectional view in the process of manufacturing the nitridesemiconductor HFET illustrated in FIG. 8.

FIG. 10 is a sectional view in a nitride semiconductor HFET which isdifferent from the nitride semiconductors HFET illustrated in FIG. 1 andFIG. 8.

FIG. 11 is a sectional view in the process of manufacturing the nitridesemiconductor HFET illustrated in FIG. 10.

FIG. 12 is a sectional view in a step following FIG. 11.

FIG. 13 is a sectional view in a step following FIG. 12.

FIG. 14 is a sectional view in a step following FIG. 13.

FIG. 15 is a diagram illustrating a relationship between a Si—H bondconcentration of an insulating film and an annealing temperature.

DESCRIPTION OF EMBODIMENTS

Hereinafter, the invention will be described in detail with reference toembodiments illustrated in drawings. In the drawings, the same referencenumerals denote the same parts or corresponding parts. In addition, thedimensions on the drawing such as the length, the width, the thickness,and the depth have been appropriately changed from the actual scale forclarification and simplification of the drawings, and do not representactual relative dimensions.

First Embodiment

FIG. 1 is a sectional view in a nitride semiconductor heterojunctionfield effect transistor (HFET) as a nitride semiconductor device of thefirst embodiment.

As illustrated in FIG. 1, the nitride semiconductor HFET in the presentembodiment is formed by sequentially laminating a buffer layer 2 formedof an undoped AlGaN, a channel layer 3 formed of an undoped GaN, and abarrier layer 4 formed of an undoped Al_(x)Ga_(1-x)N (0<x<1) on asubstrate 1 formed of Si. In the present embodiment, an Al mixed crystalratio x in Al_(x)Ga_(1-x)N satisfies an expression represented byx=0.17.

The above-described two dimensional electron gas is generated on aninterface between the channel layer 3 and the barrier layer 4. Notethat, in the present embodiment, a nitride semiconductor multilayerstructure 5 is formed of the buffer layer 2, the channel layer 3, andthe barrier layer 4. In addition, in the present embodiment, thethickness of the barrier layer 4 is set to be 30 nm.

A source electrode 6 and a drain electrode 7 are formed on the nitridesemiconductor multilayer structure 5 at an interval set in advance.Here, the source electrode 6 and the drain electrode 7 are formed of,for example, Ti/Al/TiN which is obtained by sequentially laminating Ti,Al, and TiN. Note that, the source electrode 6 and the drain electrode 7are formed such that a recess to reach the channel layer 3 is formed ina place where the source electrode 6 and the drain electrode 7 areformed in the nitride semiconductor multilayer structure 5, and an ohmiccontact is formed by sputtering and annealing an electrode material.

A gate electrode 8 is formed on the nitride semiconductor multilayerstructure 5 and between the source electrode 6 and the drain electrode7. The gate electrode 8 is manufactured by using, for example, WN.

An insulating film 9 formed of silicon nitride (SiN) is formed betweenthe source electrode 6 and the gate electrode 8 and between the gateelectrode 8 and the drain electrode 7 on the nitride semiconductormultilayer structure 5. Here, a field plate portion 8 a which extendsand sticks out over the insulating film 9 is formed at an end portion onthe source electrode 6 side in the gate electrode 8. In addition, afield plate portion 8 b which extends and sticks out over the insulatingfilm 9 is formed at an end portion on the drain electrode 7 side in thegate electrode 8.

In the present embodiment, as the insulating film 9, a SiN film in whicha concentration of Si—H bonds is 2.0×10²¹ cm⁻³, a concentration of N—Hbonds is 4.0×10²¹ cm⁻³, a refractive index is 1.91, and relativepermittivity is 7.2 is used. In addition, the thickness of theinsulating film 9 is set to be 200 nm.

Although details will be described later, the insulating film 9 has afunction of suppressing an increase in the leakage current on a hightemperature and high voltage stress test.

Note that, the refractive index of the insulating film 9 is a valueobtained by ellipsometrically measuring a single layer membrane which isformed under the same conditions with a wavelength of 633 nm. Inaddition, the relative permittivity is a value calculated from acapacitance value obtained by measuring a structure in which a singlelayer membrane which is formed under the same conditions is interposedbetween metals at a frequency of 100 kHz. The refractive index and therelative permittivity of a second insulating film and a third insulatingfilm in the following embodiments are calculated in the same way.

In addition, the concentration of Si—H bonds and the concentration ofN—H bonds of the insulating film 9 are values which are obtained bymeasuring a single layer membrane which is formed under the sameconditions with a fourier transformation infrared spectrophotometer(FT-TR), and are calculated from a peak area and conversion formuladisclosed in NPL (W. A. Lanford and M. J. Rand, J. Appl. Phys. 49, 2473(1978)).

Note that, the concentration of Si—H bonds and the concentration of N—Hbonds of the second insulating film and the third insulating film usedin the following embodiments are calculated in the same way as that inthe case of the insulating film 9.

Next, a method of manufacturing a nitride semiconductor HFET in thepresent embodiment will be described with FIG. 2 to FIG. 7.

First, as illustrated zn FIG. 2, the undoped AlGaN buffer layer 2, theundoped GaN channel layer 3, and the undoped AlGaN barrier layer 4 aresequentially formed on the Si substrate 1 by using a metal organicchemical vapor deposition (MOCVD) method.

Next, as illustrated in FIG. 3, a SiN film which is the insulating film9 is formed on the AlGaN barrier layer 4 by using a plasma chemicalvapor deposition (CVD) method. A growth temperature of the insulatingfilm 9 is set, for example, to 225° C.; however, it may be a temperaturein a range of 100° C. to 400° C.

Further, a resist pattern is formed on the insulating film 9 through atypically-used photolithography process, and then an opening portion 10is formed in the insulating film 9 through wet etching using, forexample, a buffered hydrofluoric acid (SHE). Note that, the openingportion 10 may be formed through dry etching instead of the wet etching.

Then, in a state illustrated in FIG. 3, for example, annealing (heattreatment) is performed at 800° C. for 60 minutes in a nitrogenatmosphere. With such an annealing treatment, the hydrogen in the SiNfilm 9 is desorbed, a concentration of Si—H bonds is decreased, and awet etching rate by the BHF is lowered. With the annealing, theconcentration of Si—H bonds of the insulating film 9 is obtained to be2.0×10²¹ cm⁻³.

Note that, the temperature for annealing the insulating film 9 is set tobe, for example, 800° C.; however, in order to obtain the concentrationof Si—H bonds of the insulating film 9 to be equal to or less than6.0×10²¹ cm⁻³, the temperature may be 600° C. or higher. That is, if theinsulating film 9 is annealed at 600° C., as illustrated in FIG. 15, itis possible to set the concentration of Si—H bonds to be equal to orless than 6.0×10²¹ cm⁻³. In this case, if the temperature for annealingthe insulating film 9 is set to be 800° C. or higher, it is possible toobtain an effect of suppressing the current collapse.

Next, as illustrated in FIG. 4, WN is sputtered on the insulating film 9and in the opening portion 10, a resist pattern is formed through atypically-used photolithography process, and then the gate electrode 8is formed through dry etching.

Then, as illustrated in FIG. 5, a resist pattern is formed on theinsulating film 9 and the gate electrode 8 through a typically-usedphotolithography process, and then a portion of the insulating film 9, aportion of the undoped AlGaN barrier layer 4, and a portion of theundoped GaN channel layer 3 are removed through dry etching so as toform opening portions 11 and 12. Note that, the opening portions 11 and12 may be formed in the insulating film 9 through wet etching instead ofthe dry etching.

Next, as illustrated in FIG. 6, a Ti/Al/TiN multilayer metal film isformed by sequentially laminating Ti, Al, and TiN on the insulating film9 and in the opening portions 11 and 12 through sputtering. Here, a TiNlayer is a cap layer for protecting a Ti/Al layer from a post-process.Note that, Ti and Al may be laminated through vapor deposition insteadof the sputtering. After this, for example, an ohmic contact between theGaN channel layer 3 and the Ti/Al/TiN multilayer metal film is obtainedby performing annealing at a temperature of 400° C. or higher and 500°C. or lower for 10 minutes or longer.

After that, a resist pattern is formed through a typically-usedphotolithography process, and then the source electrode 6 and the drainelectrode 7 are formed by dry etching. In this way, the nitridesemiconductor HFET is complete.

The present inventors conducted various studies regarding the insulatingfilm 9 formed on the nitride semiconductor multilayer structure 5. As aresult, it was found that when an insulating film formed of SiN having aconcentration of Si—H bonds equal to or less than 6.0×10²¹ cm⁻³ is used,it is possible to suppress the increase in the leakage current throughthe high temperature and high voltage stress test.

Here, the high temperature and high voltage stress test is anacceleration test for evaluating an increase of the leakage current bycausing the nitride semiconductor HFET to be kept for a certain time atan off voltage higher than a typically-used off voltage in a state wherethe nitride semiconductor HFET is kept at a temperature higher than atypically-used temperature, and in a switching off state. When using thenitride semiconductor HFET as a switching device, it is essential thatthe increase in the leakage current is suppressed so as to prevent theHFET from being destroyed due to the leakage current.

FIG. 7 illustrates a relationship between the yield on the hightemperature and high voltage stress test and the Si—H bond concentrationof the insulating film 9 which is formed on the nitride semiconductor.In the test, a gate voltage is set such that the nitride semiconductorHFET is in an off state, and a voltage of 650 V is applied to the drainelectrode 7 for 100 hours under the ambient temperature of 180° C. Theyield is calculated by measuring the leakage current of the HFET beforeand after conducting the test, and then determining an element in whichthe leakage current after the test exceeds five times the leakagecurrent before the test to be defective.

With reference to FIG. 7, it is confirmed that when the concentration ofSi—H bonds of the SiN used as the insulating film 9 is equal to or lessthan 6×10²¹ cm⁻³, it is possible to achieve a yield of 100% on the hightemperature and high voltage stress test, and thus the nitridesemiconductor device can be used as a switching device.

In addition, when the concentration of N—H bonds of the SiN used as theinsulating film 9 is set equal to or greater than 1.0×10²¹ cm⁻³, even ina case where 650 V of voltage is applied to the drain electrode 7 for200 hours in a state where the nitride semiconductor HFET is off, it ispossible to achieve a yield of 100% on the high temperature and highvoltage stress test.

In addition, if the insulating film 9 formed of the SiN is annealed at800° C. or higher, it is possible to obtain the effect of suppressingthe current collapse.

Second Embodiment

FIG. 8 is a sectional view in a nitride semiconductor HEFT of the secondembodiment.

As illustrated in FIG. 8, the nitride semiconductor HFET in the presentembodiment includes the same nitride semiconductor multilayer structure5 as that in the first embodiment. In addition, an insulating filmformed between the source electrode 6 and the gate electrode 8 andbetween the gate electrode 8 and the drain electrode 7 on the nitridesemiconductor multilayer structure 5 is formed of a first insulatingfilm 9 formed of silicon nitride (SiN) which is the same as theinsulating film 9 in the first embodiment, and a second insulating film15 formed of SiN on the first insulating film 9. Except for thisconfiguration, the rest configurations are the same as those in thefirst embodiment.

In the present embodiment, as a SiN film of the first insulating film 9,a SiN film in which a concentration of Si—H bonds is 2.0×10²¹ cm⁻³, aconcentration of N—H bonds is 4.0×10²¹ cm⁻³, a refractive index is 1.91,and relative permittivity is 7.2 is used. In addition, the thickness ofthe first insulating film 9 is set to be 10 nm.

In addition, as the second insulating film 15, a SiN film in which theconcentration of Si—H bonds is 6.0×10²¹ cm⁻³, the concentration of N—Hbonds is 1.0×10²¹ cm⁻³, the refractive index is 1.99, and the relativepermittivity is 7.8 is used. In addition, the thickness of the secondinsulating film 15 is set to be 200 nm.

Although details will be described later, the second insulating film 15has a function of protecting the first insulating film 9 in a process ofmanufacturing the nitride semiconductor HFET.

Next, a method of manufacturing the nitride semiconductor HFET in thepresent embodiment will be described with reference to FIG. 2 and FIG.9.

First, similarly to the case in the first embodiment, as illustrated inFIG. 2, the undoped AlGaN buffer layer 2, the undoped GaN channel layer3, and the undoped AlGaN barrier layer 4 are sequentially formed on theSi substrate 1. In addition, similar to the case of the insulating film9 in the first embodiment, the SiN film which is the first insulatingfilm 9 is formed on the AlGaN barrier layer 4 by using a plasma CVDmethod.

Subsequently, the SiN film which is the second insulating film 15 isformed by using a plasma CVD method. The growth temperature of the firstinsulating film 9 and the second insulating film 15 is set to be, forexample, 225° C.; however, it may be a temperature in a range of 100° C.to 400° C.

Then, a resist pattern is formed on the second insulating film 15through a typically-used photolithography process, and then an openingportion 16 is formed on the first insulating film 9 and the secondinsulating film 15 by wet etching using, for example, theabove-described BHF as illustrated in FIG. 9. Note that, the openingportion 16 may be formed through dry etching instead of the wet etching.

At this time, when the first insulating film 9 is covered with thesecond insulating film 15 having the concentration of Si—H bonds greaterthan that of the first insulating film 9, it is possible to prevent thefirst insulating film 9 from being reformed due to a chemical solutiontreatment or a plasma treatment at the time of peeling the resist in thephotolithography process.

Next, in the state as illustrated in FIG. 9, annealing (heat treatment)is performed at 800° C. for 60 minutes in a nitrogen atmosphere. Withsuch an annealing treatment, the hydrogen in the SiN film is desorbed, aconcentration of Si—H bonds is decreased, and a wet etching rate by theSHE is lowered. With the annealing, the concentration of Si—H bonds ofthe first insulating film 9 is set to be 2.0×10²¹ cm⁻³, and theconcentration of Si—H bonds of the second insulating film 15 is set tobe 6.0×10²¹ cm⁻³.

Then, WN is sputtered on the second insulating film 15 and in theopening portion 16. Thereafter, the same process as the processperformed on the insulating film 9 in the first embodiment is performedon the second insulating film 15, and thereby, the nitride semiconductorHFET is complete.

The present inventors conducted studies regarding the second insulatingfilm 15 formed on the first insulating film 9. As a result, it was foundthat with an insulating film which is formed of SiN having theconcentration of Si—H bonds greater than that of the first insulatingfilm 9 and is resistant to the chemical solution treatment and theplasma treatment at the time of peeling the resist, it is possible toprotect the first insulating film 9, and it is possible to furthersuppress the increase in the leakage current through the hightemperature and high voltage stress test.

Third Embodiment

FIG. 10 is a sectional view in the nitride semiconductor HFET of thethird embodiment.

As illustrated in FIG. 10, in the nitride semiconductor HFET in thepresent embodiment, an insulating film formed between the sourceelectrode 6 and the gate electrode 8 and between the gate electrode 8and the drain electrode 7 on the nitride semiconductor multilayerstructure 5 includes a first insulating film 9 formed of silicon nitride(SiN) which is the same as the insulating film 9 in the firstembodiment, a second insulating film 15 formed of SiN which is formedsimilarly to the second insulating film 15 of the second embodiment onthe first insulating film 9, and a third insulating film 21 formed ofSiN on the second insulating film 15. Except for this configuration, theconfigurations are the same as those in the first embodiment.

In the present embodiment, as the first insulating film 9, a SiN film inwhich a concentration of Si—H bonds is 2.0×10²¹ cm⁻³, a concentration ofN—H bonds is 4.0×10²¹ cm⁻³, a refractive index is 1.91, and relativepermittivity is 7.2 is used. In addition, the thickness of the firstinsulating film 9 is set to be 10 nm.

In addition, as the second insulating film 15, a SiN film in which aconcentration of Si—H bonds is 8.0×10²¹ cm⁻³, a concentration of N—Hbonds is 2.0×10²¹ cm⁻³, a refractive index is 1.99, and relativepermittivity is 7.8 is used. In addition, the thickness of the secondinsulating film 15 is set to be 20 nm.

In addition, as the third insulating film 21, a SiN film in which aconcentration of Si—H bonds is 2.0×10²¹ cm⁻³, a concentration of N—Hbonds is 1.3×10²² cm⁻³, a refractive index is 1.87, and relativepermittivity is 6.8 is used. In addition, the thickness of the thirdinsulating film 21 is set to be 150 nm.

The third insulating film 21 has the concentration of Si—H bonds lessthan that of the second insulating film 15, and thus has a function ofdecreasing the leakage current from the gate electrode 8 with highinsulation properties.

Next, a method of manufacturing a nitride semiconductor HFET in thepresent embodiment will be described with reference to FIG. 9 and FIGS.11 to 14.

First, similarly to the first embodiment and the second embodiment, asillustrated in FIG. 9, the undoped AlGaN buffer layer 2, the undoped GaNchannel layer 3, and the undoped AlGaN barrier layer 4 are sequentiallyformed on the Si substrate 1. In addition, the SiN film which is thefirst insulating film 9 is formed on the AlGaN barrier layer 4.Subsequently, similarly to the second embodiment, a SiN film which isthe second insulating film 15 is formed. In this state, annealing isperformed at 800° C. for 60 minutes in a nitrogen atmosphere. With theannealing, the concentration of Si—H bonds of the first insulating film9 is set to be 2.0×10²¹ cm⁻³, and the concentration of Si—H bonds of thesecond insulating film 15 is set to be 6.0×10²¹ cm⁻³. Further, similarlyto the above-described second embodiment, the opening portion 16 isformed in the first insulating film 9 and the second insulating film 15.Hereinafter, in the present embodiment, the opening portion 16 isreferred to as a first opening portion 16.

Next, the SiN film which is the third insulating film 21 is formed onthe second insulating film 15 by using a plasma CVD method. The growthtemperature of the third insulating film 21 is set to be, for example,225° C.; however, it may be a temperature in a range of 100° C. to 400°C.

Then, as illustrated in FIG. 11, a resist pattern is formed on the thirdinsulating film 21 through a typically-used photolithography process,and then a second opening portion 22 is formed at a location of theopening portion 16 on the third insulating film 21 by the wet etchingusing, for example, the above-described BHF.

In this case, the wet etching rate of the third insulating film 21 ishigher than the wet etching rate of the annealed second insulating film15, and thus a stepped shape 23 which is formed at an edge of the firstopening portion 16 is formed in the second opening portion 22.

Next, in the state illustrated in FIG. 11, annealing (heat treatment) isperformed at 680° C. for 60 minutes in a nitrogen atmosphere. With suchan annealing treatment, hydrogen in the SiN film is desorbed, aconcentration of Si—H bonds is decreased, and a wet etching rate by theBHF is lowered. With the annealing, the concentration of Si—H bonds ofthe first insulating film 9 is set to be 3×10²¹ cm⁻³, and theconcentration of Si—H bonds of the second insulating film 15 is set tobe 8×10²¹ cm⁻³, and the concentration of Si—H bonds of the thirdinsulating film 21 is set to be 2×10²¹ cm⁻³.

Next, as illustrated in FIG. 12, WN is sputtered on the third insulatingfilm 21 and in the first and second opening portions 16 and 22, a resistpattern is formed through a typically used photolithography process, andthen the gate electrode 8 is formed through dry etching.

At this time, the stepped shape 23 is formed in the second openingportion 22, and thus a field plate portion 8 a, including a tip endportion 8 c which extends and sticks out over the third insulating film21 and a middle portion 8 d which covers an opening surface of thesecond opening portion 22 in the third insulating film 21, is formed atan end portion on the source electrode 6 side in the gate electrode 8.In addition, a field plate portion Bb including a tip end portion Bewhich extends and sticks over the third insulating film 21 and a middleportion 8 f which covers an opening surface of the second openingportion 22 in the third insulating film 21, is formed at an end portionon the drain electrode 7 side in the gate electrode 8.

The field plates 8 a and 8 b have a function of, when the nitridesemiconductor HFET is used as a switching device, relaxing the electricfield intensity applied to the nitride semiconductor multilayerstructure 5 and the insulating films 9, 15, and 21 in the vicinity ofthe gate electrode 8 at the time of turning off.

Next, as illustrated in FIG. 13, a resist pattern is formed on the thirdinsulating film 21 and the gate electrode 8 through a typically-usedphotolithography process, and then an opening portion is formed in thethird insulating film 21 by the wet etching using, for example, theabove-described BHF. Subsequently, opening portions 11 and 12 are formedby removing a portion of the second insulating film 15, a portion of thefirst insulating film 9, a portion of the undoped AlGaN barrier layer 4,and a portion of the undoped GaN channel layer 3 by using the sameresist pattern through dry etching. Note that, the opening portion maybe formed in the third insulating film 21 through dry etching instead ofthe wet etching.

Next, as illustrated in FIG. 14, a Ti/Al/TiN multilayer metal film isformed by sequentially laminating Ti, Al, and TiN on the thirdinsulating film 21 and in the opening portions 11 and 12 throughsputtering. Hereinafter, the same process as that performed on theTi/Al/TiN multilayer metal film in the first embodiment is performed onthe aforementioned Ti/Al/TiN multilayer metal film so as to form thesource electrode 6 and the drain electrode 7. In this way, the nitridesemiconductor HFET is complete.

The present inventors conducted studies regarding the third insulatingfilm 21 formed on the second insulating film 15. As a result, it wasfound that as the third insulating film 21, when an insulating filmformed of SiN having a concentration of Si—H bonds which is less thanthat of the second insulating film 15 is used, it is possible todecrease the leakage from the gate electrode 8 with high insulationproperties. In addition, it was found that when the field plate portions8 a and 8 b are formed on the gate electrode 8, it is possible to relaxthe electric field intensity applied to the nitride semiconductormultilayer structure 5 and the insulating films 9, 15, and 21 in thevicinity of the gate electrode 8 at the time of turning off, and thus itis possible to further suppress the increase in the leakage currentthrough a high temperature and high voltage stress test.

Note that, the invention is not limited to the above-describedembodiments, materials and dimensions and the like in the substrate, thenitride semiconductor multilayer structure 5, the insulating films, andthe electrodes may be variously changed within the scope of the claims.

For example, in the respective embodiments, the nitride semiconductorHFET using a Si substrate was described. However, the invention is notlimited to the Si substrate. For example, a sapphire substrate or a SiCsubstrate may be used, or a nitride semiconductor layer may be grown ona substrate which is formed of a nitride semiconductor in which an AlGaNlayer is grown on the GaN substrate. In addition, as a component of thenitride semiconductor multilayer structure, a hetero improvement layermay be formed between the channel layer 3 and the barrier layer 4.

In addition, the GaN channel layer 3 is used as a component of thenitride semiconductor multilayer structure 5 in the respectiveembodiments; however, the AlGaN layer having a composition with a bandgap smaller than that of the AlGaN barrier layer 4 may be used insteadof the GaN channel layer 3. Further, as a cap layer, a layer which isformed of GaN and has a thickness of approximately 1 nm may be providedon the AlGaN barrier layer 4, for example.

The barrier layer 4 having a thickness in a range of 20 nm to 40 nm istypically used; however, the thickness is not particularly limited. Forexample, any thickness may be set in order to obtain a desired sheetcarrier concentration, a desired threshold voltage, or the like.Further, in the respective embodiments, Al—Ga_(1-x)N having the mixedcrystal ratio satisfying an expression represented by x=0.17% is used asthe barrier layer 4. However, there is no particular limitation as longas it is crystalline which induces the 2 DEG and operates as atransistor.

In addition, in the respective embodiments, the insulating film 9 isannealed at 800° C.; however, the annealing temperature may be equal toor higher than 600° C. When the insulating film 9 is annealed at atemperature equal to or higher than 600° C., it is possible to obtain aconcentration of Si—H bonds equal to or less than 6.0×10²¹ cm⁻³.

In addition, the insulating film 9 is annealed after forming the openingportion 16 in the first and second embodiments; whereas the insulatingfilm 9 is annealed before forming the opening portion 16 in the thirdembodiment. However, any method of the first to third embodiments may beused, and after forming the insulating film 9, the insulating film 9 maybe annealed until the gate electrode or the ohmic electrode is formed.

In addition, in the respective embodiments, WN is used as a material ofthe gate electrode 8; however, the material is not limited to the WN,and for example, a material formed of TiN, Ni/Au, or the like may beused.

Further, in the respective embodiments, as the source electrode 6 andthe drain electrode 7, the ohmic electrode is formed by laminating theTi/Al/TiN; however, the configuration is not limited thereto, and theTiN which is the cap layer is not necessarily formed, for example. Inaddition, the Ti/Al is laminated through sputtering, and then Au, Ag,Pt, or the like may be laminated thereon. In addition, Ti and Al may belaminated through vapor deposition instead of the sputtering.

Further, in the second and third embodiments, the thickness of the firstinsulating film 9 is preferably in a range of several nm to 20 nm. Ifthe film thickness is excessively small, the yield on the hightemperature and high voltage stress test is decreased. In contrast, ifthe film thickness is excessively large, when the opening portion 16 forthe gate electrode 8 is formed through wet etching, the side etchingoccurs on the first insulating film 9, and thus voids are formed.

Further, the total thickness of the first insulating film 9 and thesecond insulating film 15 is preferably in a range of 25 nm to 200 nm.If the film thickness is excessively small, the first insulating film 9may be reformed due to a chemical solution treatment or a plasmatreatment at the time of peeling the resist. In contrast, if the filmthickness is excessively large, the effect of the field plates 8 a and 8b is reduced.

In addition, in the third embodiment, the thickness of the thirdinsulating film 21 is preferably in a range of 100 nm to several μm. Ifthe film thickness is excessively small, the electric field of thesurface of the nitride semiconductor multilayer structure 5 isincreased. In contrast, if the film thickness is excessively large,there is a problem in that a stress due to the third insulating film 21is increased and a wafer is warped.

Hereinafter, to summarize this invention, the nitride semiconductordevice of the invention includes a substrate 1; a nitride semiconductormultilayer structure 5 which is formed on the substrate 1, includes afirst nitride semiconductor layer 3, and a second nitride semiconductorlayer 4 having a different composition from that of the first nitridesemiconductor layer 3, and generates two dimensional electron gas on ahetero interface between the first nitride semiconductor layer 3 and thesecond nitride semiconductor layer 4; and an insulating film 9 whichcovers at least a portion of a surface of the nitride semiconductormultilayer structure 5, has a concentration of Si—H bonds equal to orless than 6.0×10²¹ cm⁻³, and is formed of silicon nitride.

With reference to FIG. 7, in a case where a concentration of Si—H bondsin the silicon nitride used as the insulating film 9 is equal to or lessthan 6×10²¹ cm⁻³ it is realized that a yield of 100% is achieved on thehigh temperature and high voltage stress test.

With such a configuration, the insulating film 9 which covers at least aportion of a surface of the nitride semiconductor multilayer structure 5and is formed of silicon nitride has a concentration of Si—H bonds equalto or less than 6.0×10²¹ cm⁻³. Accordingly, in a case of conducting ahigh temperature and high voltage stress test on a semiconductor elementby using the nitride semiconductor device, it is possible to preventoccurrence of defects in which the leakage current after the testexceeds five times the leakage current before the test, and thereby itis possible to improve the properties of the insulating film 9.

That is, it is possible to provide a nitride semiconductor device whichis capable of being used as a switching device for a long period time.

In addition, in the nitride semiconductor device of an embodiment, thesilicon nitride which forms the insulating film 9 has the refractiveindex of equal to or lower than 1.95.

In addition, in the nitride semiconductor device of an embodiment, aconcentration of N—H bonds of the silicon nitride which forms theinsulating film 9 is equal to or greater than 1.0×10²¹ cm⁻³.

According to such an embodiment, a concentration of N—H bonds in theinsulating film 9 is equal to or greater than 1.0×10²¹ cm⁻³.Accordingly, in a case of conducting a high temperature and high voltagestress test on a semiconductor element by using the nitridesemiconductor device under the strict conditions, it is possible toprevent occurrence of defects in which the leakage current after thetest exceeds five times the leakage current before the test, and therebyit is possible to improve the properties of the insulating film 9.

In addition, in the nitride semiconductor device of an embodiment, thesilicon nitride which forms the insulating film 9 has the relativepermittivity which is higher than 6 and lower than 8 at 100 kHz.

In addition, in the nitride semiconductor device of an embodiment, theinsulating film 9 is a first insulating film and the nitridesemiconductor device further includes a second insulating film 15 whichis laminated on the first insulating film 9, and is formed of siliconnitride of which a concentration of the Si—H bonds is greater than thatof the first insulating film 9.

According to such an embodiment, the second insulating film 15 laminatedon the first insulating film 9 in which the leakage current afterconducting the high temperature and high voltage stress test does notexceeds five times the leakage current before the test uses theinsulating film formed of the silicon nitride having a concentration ofthe Si—H bonds greater than that of the first insulating film 9.Accordingly, the second insulating film 15 is resistant to the chemicalsolution treatment and the plasma treatment at the time of peeling theresist and is excellent in stabilizing the surface, and thus it ispossible to protect the first insulating film 9, thereby furthersuppressing the increase in the leakage current on the high temperatureand high voltage stress test.

Further, in the nitride semiconductor device of an embodiment, thesilicon nitride forming the second insulating film 15 has the refractiveindex which is higher than 1.95 and lower than 2.00.

In addition, in the nitride semiconductor device of an embodiment, atotal film thickness of the first insulating film 9 and the secondinsulating film 15 is equal to or greater than 25 nm.

According to such an embodiment, the total thickness of the firstinsulating film 9 and the second insulating film 15 is equal to orgreater than 25 nm, and thus it is possible to prevent the firstinsulating film 9 from being reformed due to the chemical solutiontreatment or the plasma treatment at the time of peeling the resist.

In addition, the nitride semiconductor device of an embodiment furtherincludes a third insulating film 21 which covers at least a portion ofthe second insulating film 15, is formed of silicon nitride of which aconcentration of Si—H bonds is less than that of the second insulatingfilm 15.

According to such an embodiment, the silicon nitride of which aconcentration of the Si—H bonds is less than that of the secondinsulating film 15 is used as the third insulating film 21 which coversthe second insulating film 15. Accordingly, it is possible to decreasethe leakage current with high insulation properties of the insulatingfilm.

In addition, in the nitride semiconductor device of an embodiment, thesilicon nitride which forms the third insulating film 21 has arefractive index of equal to or lower than 1.90.

Further, a method of manufacturing a nitride semiconductor device of theinvention is a method of manufacturing the nitride semiconductor deviceof the invention or an embodiment, in which the insulating film 9 isannealed at 800° C. or higher.

With such a configuration, it is possible to suppress the currentcollapse by annealing the insulating film 9 at 800° C. or higher.

In addition, a method of manufacturing the nitride semiconductor deviceof the invention includes a step of laminating a nitride semiconductormultilayer structure 5 including a first nitride semiconductor layer 3and a second nitride semiconductor layer 4 having a differentcomposition from that of the first nitride semiconductor layer 3 on asubstrate 1 such that two dimensional electron gas is generated in ahetero interface between the first nitride semiconductor layer 3 and thesecond nitride semiconductor layer 4; and a step of covering at least aportion of the surface of the nitride semiconductor multilayer structure5 with an insulating film 9 which has a concentration of Si—H bondsequal to or less than 6.0×10²¹ cm⁻³, and formed of the silicon nitride.

With such a configuration, a concentration of the Si—H bonds of theinsulating film 9 which covers at least a portion of the surface of thenitride semiconductor multilayer structure 5 and is formed of thesilicon nitride is set to be equal to or less than 6.0×10²¹ cm⁻³.Accordingly, in a case of conducting a high temperature and high voltagestress test on the present nitride semiconductor device, it is possibleto prevent occurrence of defects in which the leakage current after thetest exceeds five times the leakage current before the test, and therebyit is possible to improve the properties of the insulating film 9.

That is, it is possible to provide a nitride semiconductor device whichis capable of being used as a switching device for a long period time.

In addition, a method of manufacturing the nitride semiconductor deviceof the invention includes a step of laminating a nitride semiconductormultilayer structure 5 including a first nitride semiconductor layer 3and a second nitride semiconductor layer 4 having a differentcomposition from that of the first nitride semiconductor layer 3 on asubstrate 1 such that two dimensional electron gas is generated in ahetero interface between the first nitride semiconductor layer 3 and thesecond nitride semiconductor layer 4; and a step of covering at least aportion of the surface of the nitride semiconductor multilayer structure5 with an insulating film 9 which has a refractive index equal to orlower than 1.95 and is formed of the silicon nitride.

With such a configuration, the refractive index of the insulating film 9which covers at least a portion of the surface of the nitridesemiconductor multilayer structure 5 and is formed of the siliconnitride is set to be equal to or lower than 1.95.

In addition, the method of manufacturing a nitride semiconductor deviceof an embodiment further includes a step of the insulating film 9 beinga first insulating film and laminating a second insulating film 15 whichis laminated on the first insulating film 9 and is formed of the siliconnitride of which a concentration of the Si—H bonds is greater than thatof the first insulating film 9.

According to such an embodiment, the second insulating film 15 formed ofthe silicon nitride having a concentration of Si—H bonds greater thanthat of the first insulating film 9 is laminated on the first insulatingfilm 9 in which the leakage current after conducting the hightemperature and high voltage stress test does not exceeds five times theleakage current before the test.

Accordingly, it is possible to protect the first insulating film 9, andthereby further suppressing the increase in the leakage current throughthe high temperature and high voltage stress test.

In addition, in the method of manufacturing a nitride semiconductordevice of an embodiment, the above-described silicon nitride forming thesecond insulating film 15 laminated in the step of laminating the secondinsulating film 15 has the refractive index of higher than 1.95 andlower than 2.00.

In addition, the method of manufacturing a nitride semiconductor deviceof an embodiment further includes a step of covering at least a portionof the second insulating film 15 with a third insulating film 21 whichis formed of the silicon nitride of which a concentration of the Si—Hbonds is less than that of the second insulating film 15.

According to such an embodiment, the second insulating film 15 iscovered with the third insulating film 21 formed of the silicon nitrideof which a concentration of the Si—H bonds is less than that of thesecond insulating film 15. Accordingly, it is possible to decrease theleakage current with high insulation properties of the insulating film.

In addition, in the method of manufacturing a nitride semiconductordevice of an embodiment, the silicon nitride which forms the thirdinsulating film 21 laminated in the step of laminating the thirdinsulating film 21 has the refractive index of equal to or lower than1.90.

REFERENCE SIGNS LIST

-   -   1 SUBSTRATE    -   2 UNDOPED AlG_(a)N BUFFER LAYER    -   3 UNDOPED GaN CHANNEL LAYER    -   4 UNDOPED AlGaN BARRIER LAYER    -   5 NITRIDE SEMICONDUCTOR MULTILAYER STRUCTURE    -   6 SOURCE ELECTRODE    -   7 DRAIN ELECTRODE    -   8 GATE ELECTRODE    -   8 a, 8 b FIELD PLATE PORTION    -   9 INSULATING FILM, FIRST INSULATING FILM    -   10, 11, 12, 16, 22 OPENING PORTION    -   15 SECOND INSULATING FILM    -   21 THIRD INSULATING FILM    -   23 STEPPED SHAPE

1-6. (canceled)
 7. A nitride semiconductor device comprising: asubstrate; a nitride semiconductor multilayer structure which is formedon the substrate, includes a first nitride semiconductor layer and asecond nitride semiconductor layer having a different composition from acomposition of the first nitride semiconductor layer, and generatestwo-dimensional electron gas on a hetero interface between the firstnitride semiconductor layer and the second nitride semiconductor layer;and an insulating film which covers at least a portion of a surface ofthe nitride semiconductor multilayer structure, has a concentration ofSi—H bonds equal to or less than 6.0×10²¹ cm⁻³, and is found of siliconnitride, wherein the silicon nitride forming the insulating film has aconcentration of N—H bonds equal to or greater than 1.0×10²¹ cm⁻³. 8.The nitride semiconductor device according to claim 7, wherein theinsulating film is a first insulating film and the nitride semiconductordevice further comprises a second insulating film which is laminated onthe first insulating film and is formed of silicon nitride of which aconcentration of Si—H bonds is greater than the concentration of Si—Hbonds of the first insulating film.
 9. The nitride semiconductor deviceaccording to claim 8, wherein a total film thickness of the firstinsulating film and the second insulating film is equal to or greaterthan 25 nm.
 10. The nitride semiconductor device according to claim 8,further comprising: a third insulating film which covers at least aportion of the second insulating film, is formed of silicon nitride ofwhich a concentration of Si—H bonds is less than the concentration ofSi—H bonds of the second insulating film.
 11. A method of manufacturinga nitride semiconductor device, the method manufacturing the nitridesemiconductor device according to claim 7, wherein the insulating filmis annealed at 800° C. or higher.